TPL910

1-A Output, High-PSRR, Low-Noise LDO Regulator

Datasheet

TPL910.pdf

产品特性

  • Input Voltage Range: 2.2 V to 6.5 V

  • Output Voltage Options:

    ◆ Fixed Output Voltage: 0.8 V to 5 V

    ◆ Adjustable Output Voltage: 0.8 V to 5.2 V

  • 3% Accuracy over Line Regulation, Load Regulation, and Operating Temperature Range

  • 1 A Maximum Output Current

  • Low Dropout Voltage: 500 mV Maximum at 1 A

  • High PSRR:

    ◆ 65 dB at 1 kHz

    ◆ 50 dB at 100 kHz

  • 24 μVRMS Output Voltage Noise (100 Hz to 100kHz)

  • Excellent Transient Response

  • Stable with a 10 μF or Larger Ceramic Output Capacitor

  • Thermal Shutdown and Over-Current Protection

  • Operating Junction Temperature: –40°C to +125°C

  • Package: 3×3 DFN-8

典型应用

  • Wireless Communication: CPU, ASIC, FPGA, CPLD, DSP

  • High-Performance Analog: ADC, DAC, LVDS, VCO

  • Noise-Sensitive Imaging: CMOS Sensors, Video ASICs

技术文档

标题 类型 时间 媒体
【Technical Document】简析LDO的输出电容 LDO 2017-12-29 3PEAK
【Technical Document】浅谈LDO中应用保护措施 LDO 2017-12-29 3PEAK

工具与软件

标题 类型 时间 媒体

设计资源

N/A

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