TPL930

3-A Output, High-PSRR, Low-Noise LDO Regulator

Datasheet

TPL930.pdf

产品特性

  • Input Voltage Range:

    ◆ Without BIAS: 1.4V to 6.5V

    ◆ With BIAS: 1.1V to 6.5V

  • Output Voltage Options:

    ◆ Fixed Output Voltage: 0.8 V to 3.95 V

    ◆ Adjustable Output Voltage: 0.8 V to 5.2 V

  • ±1% Output Accuracy Over Line, Load Regulation, and Operating Temperature Range With BIAS

  • 3A Maximum Output Current

  • Low Dropout Voltage: 145 mV typ at 3 A

  • High PSRR:

    ◆ 70dB at 1kHz

    ◆ 40dB at 1MHz

  • 6μVRMS Output Voltage Noise

  • Excellent Transient Response

  • Enable and Adjustable Soft-Start Control

  • Open-Drain Power-Good (PG) Output

  • Stable with a 47μF or Larger Ceramic Output Capacitor

  • Thermal Shutdown and Over-Current Protection

  • Operating Junction Temperature: –40°C to +125°C

  • Package Options:

    ◆ 3.5×3.5 QFN-20

典型应用

  • Wireless Communication: CPU, ASIC, FPGA, CPLD, DSP

  • High-Performance Analog: ADC, DAC, LVDS, VCO

  • Noise-Sensitive Imaging: CMOS Sensors, Video ASICs

技术文档

标题 类型 时间 媒体
【Technical Document】简析LDO的输出电容 LDO 2017-12-29 3PEAK
【Technical Document】浅谈LDO中应用保护措施 LDO 2017-12-29 3PEAK

工具与软件

标题 类型 时间 媒体

设计资源

N/A

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